I just wrote a makefile that bears its own target’s sourcecode. (The C source, obviously, is not mine.) If you run
make on it, it will extract the C source from itself, compile it, and remove it. The rule is written generically; you could include a multitude of files inside the makefile. All the well-known
make mechanisms apply as usual. Wrapped files will only be extracted if needed to build the target, f.ex.
To include a file, you write its name on a line beginning with
#> (note the space; it is important). The literal file contents follow on lines which must begin with
#= (again the space is important). A newline or end of file terminates the file.